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Ordering number : ENN7944
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SANYO Semiconductors
DATA SHEET
LV8041FN
Overview Features
Seven-Channel Motor Driver IC for Digital Cameras
Bi-CMOS IC
The LV8041FN is a digital camera motor driver IC that integrates seven driver channels on a single chip.
* Two PWM current control microstepping drive stepping motor driver channels * One constant current forward/reverse motor driver * Two PWM drive forward/reverse motor driver channels (one channel of which can be switched to function as a microstepping drive stepping motor driver) * Stepping motor drivers 1 and 2 support 2-phase, 1-2 phase, 2W1-2 phase, and 4W1-2 phase drive. * Stepping motor driver 3 operates in fixed 2W1-2 phase drive mode. * Microstepping drive step advance can be controlled with a single clock input (stepping motor drivers 1, 2, and 3) * The constant current control chopping frequency can be adjusted with an external resistor (stepping motor drivers 1, 2, and 3) * Phase detection monitor pins provided (stepping motor drivers 1, 2, and 3) * The states of all of the drivers can be set up and controlled over an 8-bit serial data interface.
Specifications
Absolute Maximum Ratings at Ta
Parameter Supply voltage 1 Supply voltage 2 Peak output current Continuous output current Allowable power dissipation Operating temperature Storage temperature
25 C
Conditions Ratings 6 6 1ch/2ch/3ch/4ch/5ch/6ch/7ch 1ch/2ch/3ch/4ch/5ch/6ch/7ch Independent IC Mounted on a 30 50 0.8 mm glass epoxy PCB 600 400 0.35 2.2 20 to 85 55 to 150 Unit V V mA mA W W C C
Symbol Vmmax VCCmax IOpeak IOmax Pd max1 Pd max2 Topr Tstg
Allowable Operating Ranges at Ta
Parameter Supply voltage range 1 Supply voltage range 2 Logic input voltage Chopping frequency Clock frequency PWM frequency
25 C
Conditions Ratings 2 to 5.5 2.7 to 5.5 0 to VCC 0.3 1ch, 2ch, 3ch, 4ch, 5ch, 6ch CLK12, CLK34, CLK56 PWM5, PWM6 50 to 200 Up to 64 Up to 100 Unit V V V KHz KHz KHz VM
Symbol VCC VIN fchop fCLK fPWM
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co., Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
81004TN (OT) No. 7944-1/24
LV8041FN
Electrical Characteristics at Ta = 25C, VM = 5 V, VCC = 5 V
Parameter Standby mode current drain Symbol Istn IM Current drain ICC VCC low-voltage cutoff voltage Low-voltage sensing hysteresis VG reference voltage Charge pump step-up voltage Charge pump startup time Charge pump oscillator frequency Thermal shutdown temperature Thermal shutdown hysteresis VthVCC VthHIS VGL VGH tONG Fchg TSD TSD C (VGH) R 20 k 0.1 F 100 150 5 ST low PWM6 PWM6 IN72 high, No load 3.5 2.1 100 4.5 8.5 50 4.5 2.35 150 4.7 9 0.1 125 160 10 Conditions
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Ratings min typ max 1 100 5.5 2.6 200 5.0 9.5 0.2 150 170 20
Unit A A mA V mV V V ms kHz C C
ST high PWM5 ST high PWM5 IN72 high, No load
Design guarantee value Design guarantee value Ta Ta 25 C, IO 25 C, IO 400mA, 400mA,
Stepping Motor Drivers (Channels 1, 2, 3, and 4) Ronu Output on-resistance Rond Output leakage current Diode forward voltage Logic pin input current Logic high-level input voltage Logic low-level input voltage IOleak VD1 IINL IINH VINH VINL ID VIN VIN 400mA 0 V (ST, CLK12, CLK34) 5 V (ST, CLK12, CLK34) 3.5 1.5 0.188 0.188 0.188 0.177 0.170 0.163 0.156 0.148 0.133 0.117 0.100 0.083 0.065 0.050 0.030 0.010 0.188 0.188 0.170 0.156 0.133 0.100 0.065 0.030 0.188 0.133 0.188 100 5V 4.5 0 50 A, VM 50 A 0.2 0.2 0.2 0.192 0.185 0.178 0.171 0.163 0.148 0.132 0.115 0.098 0.080 0.062 0.043 0.023 0.2 0.2 0.185 0.171 0.148 0.115 0.080 0.043 0.2 0.148 0.2 125 4.9 0.1 0.218 0.218 0.218 0.207 0.200 0.193 0.186 0.178 0.163 0.147 0.130 0.113 0.095 0.077 0.058 0.038 0.218 0.218 0.200 0.186 0.163 0.130 0.095 0.058 0.218 0.163 0.218 150 VCC 0.5 50 0.6 Upper side on-resistance Lower side on-resistance 0.45 0.45 1 0.9 0.55 0.55 50 1.2 1.0 70 A V A A V V V V V V V V V V V V V V V V V V V V V V V V V V V V V kHz V V
ST, CLK12, CLK34 ST, CLK12, CLK34 Step 16 (Initial state, channel 1 comparator level) Step 15 (Initial state 1) Step 14 (Initial state 2) Step 13 (Initial state 3) Step 12 (Initial state 4) Step 11 (Initial state 5) Step 10 (Initial state 6)
4W1-2 phase drive
Step 9 (Initial state 7) Step 8 (Initial state 8) Step 7 (Initial state 9) Step 6 (Initial state 10) Step 5 (Initial state 11) Step 4 (Initial state 12) Step 3 (Initial state 13) Step 2 (Initial state 14) Step 1 (Initial state 15) Step 16 (Initial state, channel 1 comparator level) Step 14 (Initial 1) Step 12 (Initial 2)
Current selection reference voltage levels
2W1-2 phase drive
Step 10 (Initial 3) Step 8 (Initial 4) Step 6 (Initial 5) Step 4 (Initial 6) Step 2 (Initial 7) Step 16 (Initial state, channel 1 comparator level) Step 8 (Initial state + 1) Step 8 Fchop VMOH VMOL R 20 k IMO IMO
1-2 phase drive 2-phase drive Chopping frequency Monitor pin (MO pin) output voltage
Continued on next page
No.7944-2/24
LV8041FN
Continued from preceding page. Parameter H Bridge Drivers (Channels 5 and 6) Ronu Output on-resistance Rond Output leakage current Diode forward voltage 1 Logic pin input current Logic high-level input voltage Logic low-level input voltage IOleak VD1 IINL IINH VINH VINL ID VIN VIN 400 mA 0 V (PWM5, PWM6) 5 V (PWM5, PWM6) 3.5 50 0.6 Ta Ta 25 C, IO 25 C, IO 400 mA, 400 mA, Upper side on-resistance Lower side on-resistance 0.45 0.45 1 0.9 Symbol Conditions
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Ratings
Unit
0.55 0.55 50 1.2 1.0 70 1.5 A V A A V V V V V V V V V V V V V V V V
PWM5, PWM6 PWM5, PWM6 Step 16 (Initial state, channel 5 comparator level) Step 14 (Initial state +1)
0.188 0.188 0.170 0.156 0.133 0.100 0.065 0.030 4.5 0 0.188 0.119 0.085 0.051
0.2 0.2 0.185 0.171 0.148 0.115 0.080 0.043 4.9 0.1 0.2 0.134 0.1 0.066
0.218 0.218 0.200 0.186 0.163 0.130 0.095 0.058 VCC 0.5 0.218 0.149 0.115 0.081
Current selection reference levels when microstepping is selected
2W1-2 phase drive
Step 12 (Initial state +2) Step 10 (Initial state +3) Step 8 (Initial state +4) Step 6 (Initial state +5) Step 4 (Initial state +6) Step 2 (Initial state +7)
Monitor pin (MO56 pin) output voltage
VMOH VMOL VSEN1 VSEN2 VSEN3 VSEN4
IMO IMO
50 A, VM 50 A (0, 0) (0, 1) (1, 0) (1, 1)
5V
(D7, D6) (D7, D6) (D7, D6) (D7, D6) Ta Ta
Current control reference voltage
Constant Current Forward/Reverse Motor Driver (Channel 7) Ronu Output on-resistance Rond Output leakage current Diode forward voltage 1 Logic pin input current Logic high-level input voltage Logic low-level input voltage Constant current output VREF7 output voltage LIM7 input current FC7 Rapid charge current FC7 steady-state charge current FC7 steady-state discharge current Serial Data Transfer Pins Logic pin input current Logic high-level input voltage Logic low-level input voltage Minimum SCLK high-level pulse width Minimum SCLK low-level pulse width Stipulated STB time Minimum STB pulse width Data setup time Data hold time Maximum CLK frequency IINL IINH VINH VINL Tsch Tscl Tlat Tlatw Tds Tdh Fclk VIN VIN 0 V (SCLK, DATA, STB) 5 V (SCLK, DATA, STB) 3.5 1.5 0.125 0.125 0.125 0.125 0.125 0.125 4 50 1.0 70 A A V V s s s s s s MHz IOleak VD1 IINL IINH VINH VINL IOUT VREF7 ILIM7 Irafc7 Ichfc7 Idisfc7 LIM7 0V 500 5 5 670 10 10 ID VIN VIN 400 mA 0 V (IN71, IN72) 5 V (IN71, IN72) 3.5 1.5 , RF 0.5 , 384 0.19 400 0.2 416 0.21 1.0 850 15 15 50 0.6 25 C, IO 25 C, IO 400 mA, 400 mA, Upper side on-resistance Lower side on-resistance 0.5 0.5 1 0.9 0.6 0.6 50 1.2 1.0 70 A V A A V V mA V A A A A
IN71, IN72 IN71, IN72 Rload LIM7 3 0.2 V
SCLK, DATA, STB SCLK, DATA, STB
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LV8041FN
Fclk Tsch Tscl
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CLK
Tds Tdh
DATA
D0
D1
D2
D6
D7 Tlat
SET
Tlatw
Package Dimensions unit: mm 3305
Pd max
2.5
-T a
W
Specified PCB: 30.0
2.2
x 50.0 x 0.8 mm
PCB material: glass epoxy
Allowable power dissipation, Pd max
-
2.0
1.5
1.14 1.0
0.5 0.35
Independent IC
SANYO : VQFN52 (7.0
7.0)
0.18 0 -20 0 20 40 60 80 100 ILV00179
Ambient temperature, T a
-
C
No.7944-4/24
LV8041FN
PGND1 VREF7 CLK12 MO12 CPH2 CPH1 LIM7 VGH IN72 IN71 VGL FC7
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Pin Assignment
OUT1A 1 SEN1 2 OUT1B 3 VM12 4 OUT2A 5 SEN2 6 OUT2B 7 OUT3A 8 SEN3 9 OUT3B 10 VM34 11 OUT4A 12 SEN4 13
52
51
50
49
48
47
46
45
44
43
42
41
CPL2
40 39 38 37 36 35 34
CPL1 VM7 OUT7B SEN7 OUT7A PGND OUT6B SEN6 OUT6A VM56 OUT5B SEN5 OUT5A
LV8041FN
33 32 31 30 29 28 27
14
15
16
17
18
19
20
21
22
23
24
25
26
PGND12 PWM6/ MO56
52 1 2 3 4 5 6 7 8 9 10 11 12 13 14
MO34
OUT4B
DATA
STB
SCLK
GND
R
PGND3
PWM5/ CLK56
CLK34
ST
VCC
Top view
VREF7
40
41
42
43
44
45
46
47
48
49
50
CPL1 VM7 OUT7B SEN7 OUT7A PGND OUT6B SEN6 OUT6A VM56 OUT5B SEN5 OUT5A
CLK12
51
MO12
CPH1
CPH2
CPL2
LIM7
VGH
IN71
IN72
VGL
FC7
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15
OUT1A SEN1 OUT1B VM12 OUT2A SEN2 OUT2B OUT3A SEN3 OUT3B VM34 OUT4A SEN4
LV8041FN
STB
OUT4B
GND
R
PWM6/ MO56
PGND3
PWM5/ CLK56
CLK34
MO34
SCLK
DATA
VCC
ST
Bottom view
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Block Diagram
M M
MO12
OUT1B OUT4A OUT3A CLK34 SCLK R
VM12 VM34 SEN4 MO34 DATA SEN2 SEN3 STB
OUT1A OUT3B CLK12 OUT2A OUT4B OUT2B
SEN1
TSD LVS
TSD LVS VGH
VGH
5
Serial-parallel converter Bridge driver Channel 3 logic Output control Bridge driver logic Channel 2 Output control
5
Bridge driver
Bridge driver
VGL
VGL
PGND12
Channel 1
Channel 4
PGND34
Current selection circuit OSC
Current selection circuit
ST
0.2 V
LV8041FN
Reference voltage circuit
VM7
VCC
VCC
2
VREF7
TSD
TSD
Constant current selection circuit
VGH
GND
LVS VGH VGH VGL
LVS Bridge driver
VGL
4
TSD LVS
VGL
Bridge driver Bridge driver
VGH
TSD LVS
LIM7
Channel 7 Channel 6
VGL
Charge pump circuit logic
Channel 5
Output control
Output control logic
PGND7
VGL
VGH
CPL2
CPH1
CPL1 SEN5 OUT5A OUT5B VM56
CPH2
FC7
IN72
IN71
SEN7
SEN6
MO56
PWM6/
OUT7B
CLK56
PWM5/
OUT6B
OUT7A
OUT6A
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LV8041FN
Pin Functions
Pin No. 4 1 3 2 5 7 6 52 51 50 22 20 21 24 11 8 10 9 12 15 13 14 16 17 30 27 29 28 25 31 33 32 26 38 45 36 35 37 48 49 34 47 46 39 40 42 43 41 44 18 23 19 Symbol VM12 OUT1A OUT1B SEN1 OUT2A OUT2B SEN2 PGND12 CLK12 MO12 SCLK DATA STB R VM34 OUT3A OUT3B SEN3 OUT4A OUT4B SEN4 PGND34 CLK34 MO34 VM56 OUT5A OUT5B SEN5 PWM5/CLK56 OUT6A OUT6B SEN6 PWM6/MO56 VM7 FC7 SEN7 OUT7A OUT7B IN71 IN72 PGND7 VREF7 LIM7 CPL1 CPL2 CPH1 CPH2 VGL VGH ST VCC GND STP 1: Motor power supply STP 1: Channel 1 OUTA output STP 1: Channel 1 OUTB output STP 1: Channel 1 current sensing resistor connection STP 1: Channel 2 OUTA output STP 1: Channel 2 OUTB output STP 1: Channel 2 current sensing resistor connection STP 1: Power system ground STP 1: Clock signal input STP 1: Phase detector monitor Serial data transfer clock input Serial data input Serial data latch pulse input Oscillator frequency setting resistor connection STP 2: Motor power supply STP 2: Channel 3 OUTA output STP 2: Channel 3 OUTB output STP 2: Channel 3 current sensing resistor connection STP 2: Channel 4 OUTA output STP 2: Channel 4 OUTB output STP 2: Channel 4 current sensing resistor connection STP 2: Power system ground STP 2: Clock signal input STP 2: Phase detector monitor PWM: Channels 5 and 6 motor power supply PWM: Channel 5 OUTA output STP 3: Channel 5 OUTA output PWM: Channel 5 OUTB output STP 3: Channel 5 OUTB output STP 3: Channel 5 current sensing resistor connection PWM: Channel 5 PWM signal input STP 3: Clock signal input PWM: Channel 6 OUTA output STP 3: Channel 6 OUTA output PWM: Channel 6 OUTB output STP 3: Channel 6 OUTB output STP 3: Channel 6 current sensing resistor connection PWM: Channel 6 PWM signal input STP 3: Phase detector monitor Constant current drive: Channel 7 motor power supply Constant current drive: Channel 7 phase compensation capacitor connection Constant current drive: Channel 7 current sensing resistor connection Constant current drive: Channel 7 OUTA output Constant current drive: Channel 7 OUTB output Constant current drive: Channel 7 logic input 1 Constant current drive: Channel 7 logic input 2 Constant current drive: Channel 7 power system ground Constant current drive: Channel 7 current control reference voltage output Constant current drive: Channel 7 constant current setting Charge pump capacitor connection Charge pump capacitor connection Charge pump capacitor connection Charge pump capacitor connection Lower side DMOS gate voltage capacitor connection Upper side DMOS gate voltage capacitor connection Chip enable Logic system power supply Signal system ground Pin description
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No.7944-7/24
LV8041FN
Serial Data Input Specifications Register (D1, D0): Data transfer target register selection
D1 0 0 1 1 D0 0 1 0 1 STP1 settings STP2 settings PWM/STP3 settings Mode Monitor/channels 5 and 6 drive mode settings
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The D1 and D0 bits in the serial data select the register used to set the motor driver state as shown above. Monitor/channel 5 and 6 drive mode settings
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 0 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 Symbol RG_SELECT1 RG_SELECT2 MO_SELECT1 MO_SELECT2 MO12_MD MO34_MD MO56_MD PWM/MICRO Register selection 1 Register selection 2 MO12 output selection 1 MO12 output selection 2 MO12 output mode setting MO34 output mode setting MO56 output mode setting Channel 5 and 6 drive mode setting Functions
STP1 Settings
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 1 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 Symbol RG_SELECT1 RG_SELECT2 F/R1 MS11 MS12 HOLD1 RESET1 OUT ENABLE1 Register selection 1 Register selection 2 Forward/reverse setting Microstep selection 1 Microstep selection 2 Step/hold setting Logic reset Output enable 1ch, 2ch (STP1) Functions Channel
STP2 Settings
Register No. D0 D1 D2 D3 D4 D5 D6 D7 Data 0 1 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 Symbol RG_SELECT1 RG_SELECT2 F/R2 MS21 MS22 HOLD2 RESET2 OUT ENABLE2 Register selection 1 Register selection 2 Forward/reverse setting Microstep selection 1 Microstep selection 2 Step/hold setting Logic reset Output enable 3ch, 4ch (STP2) Functions Channel
Channel 5 and 6 Driver Settings
Symbol Register No. Data Channel 5 and 6 drive mode setting register D7 "0" D0 D1 D2 D3 D4 D5 D6 D7 1 1 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 1 or 0 RG_SELECT1 RG_SELECT2 F/R5 DECAY5 F/R6 DECAY6 VSEN1 VSEN2 F/R3 HOLD3 RESET3 OUT ENABLE3 "1" Register selection 1 Register selection 2 Forward/reverse setting Current attenuation mode setting Forward/reverse setting Current attenuation mode setting Forward/reverse setting Step/hold setting Logic reset Output enable 5ch PWM 6ch PWM 5ch/6ch STP 5ch/6ch STP PWM mode Functions STP3 mode Channel
Current control reference voltage selection 1 Current control reference voltage selection 2
No.7944-8/24
LV8041FN
Serial Data Input Settings
ST DATA SCLK STB D0 D1 D2 D3 D4 D5 D6 D7
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State setting data latched
Data is input in order from data bit 0 to data bit 7. The data is transferred on the clock signal rising edge and after all the data has been transferred, it is latched on the rising edge of the STB signal. Timing with which the serial data is reflected in the output Type 1: For the forward/reverse (FR) and drive mode (MS) settings in STP setting mode, after the data is latched, after the clock falling edge is detected, the new settings are reflected in the output on the next rising edge on the clock signal. Type 2: For the reset and output enable settings, after the data is latched, the new settings are reflected in the output on the next rising edge on the clock signal. Type 3: For settings other than those listed above, the new settings are reflected in the output at the same time as the data is latched with the STB signal.
CLK
Falling edge detection
CLK
STB
Data latch timing Reflected on the rising edge Example: 4W1-2 phase drive
STB
Data latch timing RESET ENABLE Reflected on the rising edge Example: Reset cleared STB signal timing Cases other than those shown at the left or above
F/R (STP) MS
Example: 2-phase drive
Example: reset
No.7944-9/24
LV8041FN
Stepping Motor Drivers (STP1 (channels 1 and 2) and STP2 (channels 3 and 4)) Clock Function (STP1 (Items in parentheses refer to STP2))
Input ST Low High High CLK12 (CLK34) Operating mode Standby mode Drive step operate Operating Drive step hold Charge pump circuit Stopped
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STP State Setting Serial Data Truth Table: Six bits (STP1/STP2 settings register)
D7 (OE) D6 (RES) D5 (HOLD) D4 (MS2) D3 (MS1) D2 (F/R) 0 1 0 0 1 1 0 1 0 1 0 1 Note : Don't Care 0 1 0 1 Operating mode Clockwise (forward) Counterclockwise (reverse) 2-phase drive 1-2 phase drive 2W1-2 phase drive 4W1-2 phase drive Step/hold clear Step/hold Counter reset (Drive returns to the initial position) Counter reset clear Outputs set to the high-impedance state Outputs set to the operating state
Initial Drive Position
Drive mode 2-phase 1-2 phase 2W1-2 phase 4W1-2 1ch (3ch) 100 100 100 100 2ch (4ch) 100 0 0 0
Procedure for Calculating the Set Current IOUT = (reference voltage set current ratio)/(sense resistor (SEN) value) Since the reference voltage is 0.2 V, the following output current flows when the set current ratio is 100% and the sense resistor is 1 . IOUT 0.2 V 100 /1 200 mA Vary the value of the sense resistor (SEN) to vary the output current.
No.7944-10/24
LV8041FN
Output Current Vector Locus (One step is normalized to 90)
16 15 14 13 12 11 10 9
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100
8 (2-phase)
80
Channel 1 (channel 3) phase current ratio (%)
8 7
60
6 5
40
3
20
2
1
0 0 20 40 60 80
Channel 2 (channel 4) phase current ratio (%)
0
100
Set Current Ratios in the Various Drive Modes
STEP 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 4W1-2 phase (%) 1ch(3ch) 0 8.69 17.39 26.08 34.78 43.48 52.17 60.87 69.56 78.26 82.61 86.95 91.3 95.65 100 100 100 2ch(4ch) 100 100 100 95.65 91.3 86.95 82.61 78.26 69.56 60.87 52.17 43.48 34.78 26.08 17.39 8.69 0 100 0 100 0 100 17.39 91.3 34.78 82.61 52.17 69.56 69.56 69.56 69.56 100 100 52.17 82.61 34.78 91.3 17.39 100 2W1-2 phase (%) 1ch(3ch) 0 2ch(4ch) 100 1-2 phase (%) 1ch(3ch) 0 2ch(4ch) 100 2 phase (%) 1ch(3ch) 2ch(4ch)
No.7944-11/24
LV8041FN
2-Phase Drive (D4 = 0, D3 = 0, D2 = 0: clockwise mode)
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CLK
MO
(%)
100 0 100
I1
(%)
100 0 100
I2
1-2 Phase Drive (D4 = 0, D3 = 1, D2 = 0: clockwise mode)
CLK MO(initial)
MO(quarter)
(%) 100
I1
0 100 () % 100
I2
0 100
No.7944-12/24
LV8041FN
2W1-2 Phase Drive (D4 = 1, D3 = 0, D2 = 0: clockwise mode)
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CLK MO(initial) MO(quarter)
2W1-2 phase drive (channel 1 (channel 3): clockwise)
100 80 60 40 20 0 -20 0 -40 -60 -80 -100
11(%)
10
20
30
2W1-2 phase drive (channel 2 (channel 4): clockwise)
100 80 60 40 20 0 -20 0 -40 -60 -80 -100
12(%)
10
20
30
No.7944-13/24
LV8041FN
4W1-2 Phase Drive (D4 = 1, D3 = 1, D2 = 0: clockwise mode)
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CLK
MO(initial) MO(quarter)
100 80 60 40 11( ) 20 0 -20 0 -40 -60 -80 -100 100 80 60 40 12 ( ) 20 0 -20 0 -40 -60 -80 -100 10 20 30 40 50 60 10 20 30 40 50 60
No.7944-14/24
LV8041FN
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Set Current Step Switching (CLK pin), Forward/Reverse Switching (D2 (F/R)) Basic Operation
D2 (F/R)
Clockwise mode
Counterclockwise mode
Clockwise mode
CLK
Position number
Channel 1 output
Channel 2 output
The IC internal D/A converter advances by one bit on the rising edge of each input clock pulse. The clockwise/counterclockwise direction mode is switched by the D2 (F/R) data bit, and the direction in which the position number advances is changed by switching this mode. In clockwise mode, the channel 2 current phase is delayed by 90 as seen from the channel 1 current. In counterclockwise mode, the channel 2 current phase leads by 90 as seen from the channel 1 current. Output Enable (D7) and Reset (D6) Operational Description
OE(D7) CLK MO Power saving mode RST(D6) CLK MO Initial mode
Channel 1 output
0%
Channel 1 output
0%
Channel 2 output
Channel 2 output
The outputs are in the high-impedance state
When OE (D7) is set to 0, the outputs will be turned off on the next clock rising edge and set to the high-impedance state. However, since the internal logic circuits continue to operate, the position number will advance if the clock signal is input. Therefore, when OE (D7) is returned to 1, the IC will output levels according to the position number that has been advanced by the clock input. When RST (D6) is set to 0, the outputs are set to the initial state at the next clock rising edge, and the MO output goes to the low level. When RST (D6) is set to one after that, the operation starts from the initial state on the next clock input, and the position number begins advancing.
No.7944-15/24
LV8041FN
Hold Bit (D5) Operational Description
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logic
Internal clock
(External) clock
logic
Internal logic
HOLD(D5)
Step/hold (1) HOLD (D5) (External) clock Internal clock
Step/hold release
Step/hold (2)
Step/hold release
Held at the low level Held at the high level
Channel 1 output
0%
Channel 2 output
Hold state
Hold state
When the HOLD bit (D5) is set to 1, the internal clock signal is held at the state of the external clock at that point. Since the external clock is low at the timing of the step/hold (1) operation in the figure, the internal clock is then held at the low level. Similarly, since the external clock is high at the timing of the step/hold (2) operation in the figure, the internal clock is then held at the high level. When the HOLD bit (D5) is set to 0, the internal clock is synchronized with the normal (external) clock. The outputs retain their states at the time the step/hold operation was input, and after the step/hold is released, they proceed with the timing of the next input clock rising edge. As long as the IC is in the hold state, the position number will not be advanced even if the external clock signal is input.
No.7944-16/24
LV8041FN
Current Control Operation Specifications Sine Wave Increasing Direction
CLK
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Set current
Coil current
Set current
fchop
Current mode
CHARGE
SLOW
FAST
CHARGE
SLOW
FAST
Sine Wave Decreasing Direction Each current mode operates with the following sequence.
CLK
S e t c u rre n t
C o il c u rre n t
S e t c u rre n t
fc h o p
C u rre n t m ode
CHARGE
SLO W
FA S T
CHARGE
FA S T
CHARGE
SLO W
The IC goes to charge mode during chopping oscillation startup. (A period in which the IC forcibly operates in charge mode exists as 1/8 of a single chopping period regardless of the relationship between the magnitudes of the coil current (ICOIL) and the set current (IREF).) During charge mode, the IC compares the coil current (ICOIL) and the set current (IREF). If the ICOIL < IREF state occurs during charge mode: Charge mode continues until ICOIL IREF. After that, the IC switches to slow decay mode and then switches to fast decay mode for the last 1/8 of a single chopping period. If the ICOIL < IREF state does not occur during charge mode: The IC switches to fast decay mode and the coil current is attenuated in fast decay mode until the end of the single chopping period. The IC repeats the above operation. Normally, in the sine wave increasing direction, the IC operates in slow (+ fast) decay mode, and in the sine wave decreasing direction, the IC operates in fast decay mode until the current is attenuate to the set level, and then the IC operates in slow decay mode.
No.7944-17/24
LV8041FN
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Setting the Chopping Frequency (fchop) When this IC performs constant current control, it uses a chopping operation based on a frequency set by an external resistor. The chopping frequency set by the value of the resistor connected to the R pin (pin 24) is set as shown in the figure below.
300
Chopping frequency " bs"O u"g (kHz)
250
200
150
100
50
0 0 10 20 30 40 50 60 70 80 90 100
R' i Ri R (k k Resistance, j )
We recommend that a frequency in the range 50 kHz to 200 kHz be used.
Serial Data Truth Table for Monitor Output Settings (Monitor/channel 5 and 6 drive mode settings register) MO12 Output Setting: 2 bits
D3(MO_SELECT2) 0 0 1 1 D2(MO_SELECT1) 0 1 0 1 MO12 output state The STP1 monitor is output The STP2 monitor is output The STP3 monitor is output (If PWM/MICRO is 1.) A fixed high level is output
The MO12 pin can be set up to output any of the stepping motor driver states shown in the table above with the monitor settings register settings shown in that table. Monitor Output Mode Setting: 3 bits
D6 (MO56_MD) D5 (MO34_MD) D4 (MO12_MD) 0 1 0 1 0 1 Note : Don't Care Monitor output mode state A low level is output from MO12 in the STP1 initial state (Only when (D3, D2) (0, 0)) A low level is output from MO12 each STP1 1/4 period (Only when (D3, D2) (0, 0)) A low level is output from MO34 in the STP2 initial state (When (D3, D2) (0, 1) this is also output from MO12) A low level is output from MO34 each STP2 1/4 period (When (D3, D2) (0, 1) this is also output from MO12) A low level is output from MO56 in the STP3 initial state (When (D3, D2) (1, 0) this is also output from MO12) A low level is output from MO56 each STP3 1/4 period (When (D3, D2) (1, 0) this is also output from MO12)
The stepping motor driver monitor outputs can be switched between a mode in which an output is only provided in the initial position and a mode in which an output is provided each 1/4 period by setting the monitor setting register as shown in the table above.
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LV8041FN
PWM Drive Forward/Reverse Motor Driver (Channels 5 and 6)
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Drive Mode Setting Serial Data Truth Table: 1 bit (Monitor/channel 5 and 6 drive mode settings register)
D7(PWM/MICRO) Low High Operating mode PWM: 2 systems One microstep drive STP system Pin functions Pin 25 PWM5 CLK56 Pin 26 PWM6 MO56
The circuit operating mode can be switched between direct PWM drive H bridge drive operation and 2W1-2 phase microstep drive stepping motor drive operation by setting the D7 bit (PWM/MAICRO) as shown in the table above. PWM Drive Mode (Channels 5 and 6 drive mode setting register bit D7 = 0) Truth Table (Channels 5 and 6 driver settings register)
Inputs ST Low High High High High High High Low Low Low High Low High PWM5 (PWM6) D2 (D4) D3 (D5) OUTA OFF High Low OFF Low Outputs OUTB OFF Low High OFF Low Standby mode Clockwise (forward) Counterclockwise (reverse) Fast decay (output off) Slow decay (short-circuit braking) Operating Operating mode Charge pump circuit Stopped
Note : Don't care
Output Stage Transistor Functions
VM VM VM
ON
U1
OFF
U2
OFF
U1
ON
U2
OFF
U1
OFF
U2
OUTA
L1
OUTB
L2
OUTA
L1
OUTB
L2
OUTA
OUTB
L1
L2
OFF
ON
ON
OFF
ON
ON
(Forward)
(Reverse)
(Brake)
Forward/Reverse Output Operation Timing Chart (D3 = 0)
D2 data PW M5 U1 L1 U2 L2
OFF OFF ON ON
"L"
"H"
OFF OFF ON Forward High im pedance Forward High im pedance
ON
Reverse
High im pedance
Reverse
No.7944-19/24
LV8041FN
Brake Mode Output Operation Timing Chart (D3 = 1)
D2 data PWM5 U1 L1 U2 L2
ON OFF OFF ON "L" "H"
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OFF ON Forward Brake Forward Brake
ON OFF Reverse Brake Reverse Brake
Microstep Drive Mode (Channels 5 and 6 drive mode setting register bit D7 = 1) Clock Function (STP3)
Input ST Low High High CLK56 Operating mode Standby mode Drive step mode Operating Drive step hold Charge pump circuit Stopped
STP State Setting Serial Data Truth Table: 4 bits (Channels 5 and 6 driver settings register)
D5 (OE3) D4 (RES3) D3 (HOLD3) D2 (F/R3) 0 1 0 1 0 1 0 1 Note : Don't Care Operating mode Clockwise (forward) Counterclockwise (reverse) Step/hold clear Step/hold Counter reset (Drive goes to the initial position) Counter reset release Outputs: high impedance Output operating state
Initial Drive Position
Drive mode 2W1-2 phase drive Initial mode 5ch 100% 6ch 0%
Reference Voltage Setting Serial Data: 2 bits (Channels 5 and 6 driver settings register)
D7 (VSEN2) 0 0 1 1 D6 (VSEN1) 0 1 0 1 Current control reference voltage (when 100%) 0.2 V 0.134 V 0.1 V 0.066 V
Set Current Calculation IOUT (reference voltage set current ratio)/(sense resistor (SEN) value) Since the reference voltage can be set to either 0.2, 0.134, 0.1, or 0.066 V with the serial data, the output current can be set with either the reference voltage or the value of the sense resistor SEN.
No.7944-20/24
LV8041FN
Constant Current Forward/Reverse Motor Driver (Channel 7) Truth Table
Inputs ST Low High High High High Note : Don't care Low Low High High Low High Low High IN71 IN72 OUT7A OFF OFF High Low Low Outputs OUT7B OFF OFF Low High Low Mode Standby mode Outputs off Forward Reverse Brake Operating
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Charge pump circuit Stopped
VM7 OUT7AA Logic circuits IN71 IN72 OUT7BA
VREF7 Reference voltage LIM7
Fast charge circuit Fast discharge circuit FC7
SEN7
IN71 IN72 U1 L1 U2 L2
OFF OFF ON ON
OFF OFF High impedance ON Forward High impedance
ON ON Reverse Brake
Set Current Calculation IOUT = LIM7 voltage/SEN7 resistor Since the LIM7 voltage is an external input, the reference voltage can be set arbitrarily. The reference voltage can be set to 0.2 V by using the VREF7 pin and shorting it to the LIM7 pin. If a voltage created by resistor dividing the VREF7 voltage is input to LIM7, the reference voltage can be made variable (to voltages under 0.2 V).
No.7944-21/24
LV8041FN
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Recommended Application Circuit The values shown near the various pins are recommended values. See the Allowable Operating Ranges table earlier in this document for numerical values for the input conditions. Channels 1 and 2: Microstep drive Channels 3 and 4: Microstep drive Channels 5 and 6: Described separately Channel 7: Constant current drive
( 3) 10 k
0.01 F
0.1 F
5V 0V
5V 0V
5V 0V
0.1 F
0.1 F
0.1 F
PGND12
52
51
50
49
48
10 k
47
46
45
44
43
42
41
40
LIM7
MO12
VREF7
CPH2
1 OUT1A
CLK12
CPH1
CPL2 CPL1 39
5V
VGH
IN72
M
5V
1
2 SEN1 3 OUT1B 4 VM12 5 OUT2A
IN71
VGL
FC7
VM7 38 OUT7B 37
1
10 F
SEN7 36 OUT7A 35 PGND7 34 OUT6B 33 SEN6 32 OUT6A 31
5V
10 F
1
6 SEN2 7 OUT2B 8 OUT3A
LV8041FN
M
5V
1
9 SEN3 10 OUT3B 11 VM34 12 OUT4A
VM56 30 OUT5B 29 SEN5 28 OUT4B PWM5/ CLK56 PWM6/ MO56 CLK34 OUT5A MO34 DATA SCLK
27 10 F
10 F 1 ( 2)
13 SEN4
PGND34
GND
STB
VCC
23
ST
14
15
16
17
18
19
20
21
22
R
24
25
26
0.1 F
( 1)
Note 1: Use a single point ground for the ground lines if at all possible. 2: Here, a 1 resistor is attached for each of the SEN pin resistors. This sets an output of 200 mA when the current ratio is 100%. 3: The LIM7 reference voltage can be provided either as an external voltage or by using VREF7: either voltage dividing VREF7 (0.2 V) or simply shorting LIM7 to VREF7.
5V
20 k
5V 0V
5V 0V
Serial data input
The circuit diagram for the section enclosed in the dotted line is provided separately.
No.7944-22/24
LV8041FN
Channels 5 and 6 Recommended Circuit The channels 5 and 6 systems can be switched between microstep drive and PWM drive. Set the mode using the serial data as described earlier in this document. Application 1 ... Microstep Drive Mode (Fixed 2W1-2 phase drive)
OUT6B 33 SEN6 32 OUT6A 31 VM56 30 OUT5B 29 SEN5 28 PWM6/ MO56 PWM5/ CLK56 OUT5A
27 1 1
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M
25
26 ( 4)
5V 0V
Note 4: In microstep drive mode, pin 26 functions as a position detection monitor pin.
Application 2 ... PWM Drive Mode (1)
OUT6B 33 SEN6 32 OUT6A 31 VM56 30 OUT5B 29 SEN5 28 PWM6/ MO56 PWM5/ CLK56 OUT5A
27 ( 5)
25
26
5V 0V
5V 0V
Note 5: Since the current limiter does not operate in PWM drive mode, the sense resistor is not needed.
No.7944-23/24
LV8041FN
Application (3) PWM Drive Mode (2) (Doubled output capacity)
OUT6B 33 SEN6 32 OUT6A 31 VM56 30 OUT5B 29 SEN5 28 PWM5/ CLK56 PWM6/ MO56 OUT5A
27
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( 6)
25
26
5V 0V
Note 6: Short the inputs together. (Also short the outputs together. Do not short the outputs incorrectly: short OUT5A to OUT6A and short OUT5B to OUT6B.)
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, of otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or This catalog provides information as of August, 2004. Specifications and information herein are subject to change without notice.
No.7944-24/24

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